Modern electronic systems are constructed from a variety of circuits based on digital, analog, and high frequency components. These systems are exceptionally complex, and therefore difficult and expensive to design. Two design approaches generally exist: top-down decomposition and bottom-up assembly of constituent components. Feature sizes of the components comprising such electronic systems are now routinely smaller than the wavelength of visible light. In addition, rapid market changes drive ever-increasing demand for performance, advanced feature sets, system versatility, and a variety of other system requirements. These demands often introduce contradictory design requirements into the design process. Logic systems are routinely constructed from tens or hundreds of millions of transistors. System designers are required to make significant tradeoffs in performance, physical size, architectural complexity, power consumption, heat dissipation, fabrication complexity, and cost, to name a few. Each design decision exercises a profound influence on the resulting electronic system. To handle such electronic system complexity, designers create specifications around which to design their electronic systems. The specifications attempt to balance the many disparate demands being made of the electronic systems to contain the exploding design complexity.
Logic system designers develop a system specification to which proposed designs must conform. Comparison of proposed designs to the specification helps ensure that the designs meet critical system objectives. This process of comparison is called verification. Logic systems may be described at a variety of levels of abstraction, from low-level transistor layouts to high-level description languages. Most designers describe and design their electronic systems at a high-level of abstraction using an IEEE Standard hardware description language (HDL) such as Verilog™, SystemVerilog™, or VHDL™. The high-level HDL is easier for designers to understand, especially for a vast system, and may describe highly complex concepts that are difficult to grasp using a lower level of abstraction. The HDL description may be converted into any of the other levels of abstraction that is helpful to the developers. For example, a high-level description may be converted to a logic-level description (RTL), a gate-level (GL) description, a layout-level description, or a mask-level description. Each lower level of abstraction introduces more detail into the design description. The lower-levels of abstraction may be generated automatically by computer, derived from a design library, or created by another design automation technique. Ultimately, it is critical to ensure that the performance of the resulting lower-level designs is still capable of matching the requirements of the system specification and still provides the desired logic function.